1. Field of the Invention:
The present invention relates to digital-to-analog D/A converters; and more particularly, to D/A conversion apparatus preferably embodied in an analog-to-digital A/D circuit for improving the resolution of such A/D circuit.
In many systems where analog signals are converted to digital signals for further processing, it is desirable that such conversion occur with precision in order to preserve the information content of the signal and to minimize the introduction of noise. The analog-to-digital converters of such systems, that are mechanized, as successive approximation type, successive ranging type, or combinations thereof, also include a D/A converter that is utilized usually as feedback or reference apparatus to compensate for errors in the conversion from analog to digital. The resolution and accuracy of the final analog-to-digital conversion is dependent, of course, upon the resolution and accuracy of the digital-to-analog reference conversion incorporated therein. In this connection, the more bits that are used for the digital reference, the better the resolution. However, the greater the number of bits, the greater is the required accuracy of the D/A converter used as the reference.
For example, the conventional binary current-output D/A converter depends upon the accuracy of its trimmed resistor ladder, and also on the matching of the current switches driving the ladder. The matching of the ladder resistors and current switches becomes more critical as the resolution of the D/A converter increases. For example, a three-bit binary digital-to-analog converter which has eight different input states covering the binary range from "000" to "111", should provide eight different analog (current) output states. The difference between successive analog output levels should equal the least significant bit (LSB) weighting.
FIG. 1 is a diagram showing the relationship between an input digital code and the output level of a typical three-bit binary D/A converter. Although FIG. 1 illustrates the successive step sizes as ideally equal, a three-bit device typically requires the accuracy of each step to be within one-half step of such ideal. In other words, the accuracy need be EQU (.+-.1/2LSB)/8 LSB's=.+-.1/2/2.sup.n
where n=the number of bits. If the number of bits (n) is three, then the accuracy of the D/A converter is required to be one part out of 16. It follows then that in a four-bit D/A converter, the accuracy should be better than one part out of 32. As the number of bits increases such as up to twelve, for example, the required accuracy of the most significant bit (MSB) becomes one part of 8,192; and for thirteen bits, the accuracy required is at least one part out of 16,384. To gain insight as to the accuracy requirement and its meaning in terms of each bit, the D/A converter of FIG. 1 is broken down into weighted sections to show the relationship between each bit and the output. Curve 10 of FIG. 1 illustrates the on and off sequence of the least significant bit (LSB); while curve 11 represents the operation of the next most significant bit; and curve 12 illustrates the operation of the most significant bit (MSB). As is well known, the curves 10, 11 and 12 are all summed to provide the analog output, as represented by curve 14. Each step of the curve 14 corresponds to the increased analog value of the three bit digital input. It can be seen from Fig. l that the greatest transition occurs at the midpoint of the range or from digital word 011 to digital word 100 where all the bits change; that is, the most significant bit, represented by curve 12, changes from a zero to a one, bit two represented by curve 11 changes from a one to a zero, and the least significant bit, of course, changes from a one to a zero. At this midpoint, (1/2) the largest errors in the analog output are likely to occur. The two next greatest transition points are between words 001 and 010, and 101 and 110, respectively. These points, which represent the one-quarter and three-quarter points on the analog output range, are the points where the next greatest errors occur. These points correspond to the transition of bit two from zero to one and the transition of the least significant bit from one to zero. Although FIG. 1 illustrates a three-bit digital-to-analog converter, it is apparent that as the number of bits increases, the accuracy requirement of the MSB's becomes more stringent as previously mentioned. In an A/D converter that operates to convert both positive and negative signals, the accuracy error associated with the digital-to-analog reference conversion apparatus at half scale occurs at or near zero of the A/D converter. There are many applications, such as pulsed doppler radar systems, for example, where the input to the A/D converter is most likely at or near zero during operation which corresponds to the midpoint or half-scale of the D/A where inaccuracies are most likely to occur.
Thus, it is desirable that the analog output of digital-to-analog conversion apparatus be rendered more accurate regardless of its operating position over its range of values; and in one particular aspect, it is desirable that analog-to-digital conversion apparatus include an analog reference (i.e., D/A converter) that has minimal inaccuracies regardless of the relative position of the output over the entire range of the apparatus.